[renesas][ra6w1]完善ra6w1的基础BSP驱动 - #11691
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📌 Code Review Assignment🏷️ Tag: bsp_renesasReviewers: @kurisaW Changed Files (Click to expand)
📊 Current Review Status (Last Updated: 2026-08-11 09:41 CST)
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Pull request overview
This PR enhances the Renesas RA6W1-EK BSP by expanding generated FSP integration and adding/adjusting RT-Thread driver glue for multiple peripherals (UART, GPIO/pinmux, SPI/I2C/ADC, TIM/PWM, QSPI PSRAM, OSPI flash, WDT/RTC), along with CI attachconfig presets.
本次 PR 主要完善 Renesas RA6W1-EK 的 BSP：扩展 FSP 生成/集成内容，并补齐/调整 RT-Thread 外设驱动适配（UART、GPIO/Pin、SPI/I2C/ADC、定时器/PWM、QSPI PSRAM、OSPI Flash、WDT/RTC）及 CI attachconfig 配置。
Changes:
- Extend RA6W1 BSP Kconfig/options and generated HAL descriptors to cover more peripherals and pin configuration.
- Add new port-layer drivers for TIM_W/PWM_W and external memories (QSPI PSRAM, OSPI flash + FAL integration).
- Integrate additional FSP components (e.g., DMAC, SDMMC API headers/driver stubs) and update vector/pin/common data generation outputs.
Reviewed changes
Copilot reviewed 44 out of 45 changed files in this pull request and generated 6 comments.
Show a summary per file
| File | Description |
|---|---|
| bsp/renesas/ra6w1-ek/rtconfig.py | Switch default build mode to debug. |
| bsp/renesas/ra6w1-ek/rtconfig.h | Add UART0 pin string macros and extra section markers (generated file). |
| bsp/renesas/ra6w1-ek/rafw_gen/vector_data.h | Rework IRQ vector macros/prototypes with RT config gating. |
| bsp/renesas/ra6w1-ek/rafw_gen/vector_data.c | Populate vector table with multiple IRQ sources based on BSP options. |
| bsp/renesas/ra6w1-ek/rafw_gen/SConscript | Simplify build script, adjust group name and include path. |
| bsp/renesas/ra6w1-ek/rafw_gen/pin_data.c | Add dynamic pin config parsing/checking and pin table expansion. |
| bsp/renesas/ra6w1-ek/rafw_gen/hal_data.h | Expand HAL externs/includes for many peripherals (SPI/QSPI/OSPI/I2C/ADC/TIM/RTC/WDT). |
| bsp/renesas/ra6w1-ek/rafw_gen/common_data.h | Rename ioport instance exports and add IOPORT macro aliases. |
| bsp/renesas/ra6w1-ek/rafw_gen/common_data.c | Rename/reshape ioport instance globals. |
| bsp/renesas/ra6w1-ek/rafw_gen/bsp_clock_cfg.h | Change QSPI/peripheral clock source/dividers. |
| bsp/renesas/ra6w1-ek/rafw_cfg/fsp_cfg/r_sdemmc_w_cfg.h | Add generated SDEMMC config header. |
| bsp/renesas/ra6w1-ek/rafw_cfg/fsp_cfg/r_dmac_w_cfg.h | Add generated DMAC config header. |
| bsp/renesas/ra6w1-ek/ra/SConscript | Add DMAC sources and fix TIM_W dependency key. |
| bsp/renesas/ra6w1-ek/ra/fsp/src/r_sdemmc_w/r_sdemmc_w_private.h | Add large private header for SDEMMC driver. |
| bsp/renesas/ra6w1-ek/ra/fsp/src/r_dmac_w/r_dmac_w.c | Add DMAC_W transfer implementation source. |
| bsp/renesas/ra6w1-ek/ra/fsp/src/r_adc_w/r_adc_w.c | Fix include path for RA6W1 device definitions. |
| bsp/renesas/ra6w1-ek/ra/fsp/src/bsp_w/cmsis/Device/RENESAS/Source/system.c | Call bsp_init(NULL) and adjust newlib stub conditional blocks. |
| bsp/renesas/ra6w1-ek/ra/fsp/inc/instances/r_sdemmc_w.h | Add SDEMMC_W instance header. |
| bsp/renesas/ra6w1-ek/ra/fsp/inc/instances/r_ospi_w.h | Fix include path for sdk_defs.h. |
| bsp/renesas/ra6w1-ek/ra/fsp/inc/instances/r_dmac_w.h | Add DMAC_W instance header. |
| bsp/renesas/ra6w1-ek/ra/fsp/inc/api/r_sdmmc_api.h | Add SDMMC API header. |
| bsp/renesas/ra6w1-ek/board/ports/SConscript | Add conditional builds for timer/pwm/psram/ospi ports. |
| bsp/renesas/ra6w1-ek/board/ports/ra6w1_qspi_psram.c | Add QSPI PSRAM init + optional memheap integration. |
| bsp/renesas/ra6w1-ek/board/ports/ra6w1_ospi_flash.c | Add OSPI flash FAL flash device ops. |
| bsp/renesas/ra6w1-ek/board/ports/gpio_cfg.h | Remove legacy GPIO IRQ mapping header. |
| bsp/renesas/ra6w1-ek/board/ports/fal_cfg.h | Add RA6W1 FAL device/partition table glue. |
| bsp/renesas/ra6w1-ek/board/ports/drv_timer_w.c | Add TIM_W clock timer driver registration. |
| bsp/renesas/ra6w1-ek/board/ports/drv_pwm_w.c | Add PWM_W driver via TIM_W PWM mode. |
| bsp/renesas/ra6w1-ek/board/ports/drv_gpio_w.h | Add GPIO_W pin driver header and pin-config init declaration. |
| bsp/renesas/ra6w1-ek/board/ports/drv_gpio_w.c | Refactor pin driver init flow to use new ioport globals and pin-config init. |
| bsp/renesas/ra6w1-ek/board/Kconfig | Add/expand peripheral Kconfig options (UART pins, SPI/I2C/ADC/TIM/PWM/OSPI/QSPI PSRAM, etc.). |
| bsp/renesas/ra6w1-ek/board/board.h | Remove old GPIO/ioport alias macros from board header. |
| bsp/renesas/ra6w1-ek/board/board.c | Add RT-Thread board init entry for this BSP (heap/pin/serial/components). |
| bsp/renesas/ra6w1-ek/.config | Update default config with new options and section markers. |
| bsp/renesas/ra6w1-ek/.ci/attachconfig/attachconfig.yml | Add CI attachconfig presets for various peripherals. |
| bsp/renesas/libraries/HAL_Drivers/drivers/drv_wdt.c | Map WDT API to WDOG_W for RA6W1 and adjust logging format. |
| bsp/renesas/libraries/HAL_Drivers/drivers/drv_spi.c | Add RA6W1 SPI_W mappings and refactor bitrate config handling. |
| bsp/renesas/libraries/HAL_Drivers/drivers/drv_rtc.c | Map RTC API to RTC_W for RA6W1 and refactor time handling. |
| bsp/renesas/libraries/HAL_Drivers/drivers/drv_i2c.c | Add RA6W1 I2C_MASTER_W mappings and refactor formatting. |
| bsp/renesas/libraries/HAL_Drivers/drivers/drv_adc.c | Add RA6W1 ADC_W mappings and ADC ops extensions. |
| bsp/renesas/libraries/HAL_Drivers/drivers/config/raw/ra6w1/uart_config.h | Fix UART instance mappings (uart0/1/2 -> g_uart0/1/2). |
| bsp/renesas/libraries/HAL_Drivers/drivers/config/raw/ra6w1/adc_config.h | Add RA6W1 ADC raw config header. |
| bsp/renesas/libraries/HAL_Drivers/drivers/config/drv_config.h | Include RA6W1 ADC raw config when enabled. |
Suppressed comments (2)
bsp/renesas/ra6w1-ek/board/ports/ra6w1_ospi_flash.c:51
- [bug/缺陷]: Bitwise OR is also used when reading the stashed tail from OSPI memory; use base + address.
English: Use OSPI_W_AUTOMODE_BASE_ADD + (addr + write_len) instead of OR to avoid addressing bugs.
中文：在从 OSPI 映射区读取“尾部暂存”数据时同样使用了按位或，建议改为 OSPI_W_AUTOMODE_BASE_ADD + (addr + write_len)，避免地址计算错误。
rt_memcpy(stash,
(const void *)((addr + write_len) | OSPI_W_AUTOMODE_BASE_ADD),
stash_len);
bsp/renesas/ra6w1-ek/board/ports/ra6w1_ospi_flash.c:121
- [bug/缺陷]: Bitwise OR is also used when reading the stashed tail in erase; use base + address.
English: Use OSPI_W_AUTOMODE_BASE_ADD + (addr + erase_len) instead of OR.
中文：在擦除流程读取“尾部暂存”数据时也使用了按位或，建议改为 OSPI_W_AUTOMODE_BASE_ADD + (addr + erase_len)。
rt_memcpy(stash,
(const void *)((addr + erase_len) | OSPI_W_AUTOMODE_BASE_ADD),
stash_len);
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Comment on lines
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| static int ra6w1_ospi_flash_read(long offset, rt_uint8_t *buf, rt_size_t size) | ||
| { | ||
| rt_memcpy((void *) buf, (void *) ((uint32_t)offset | OSPI_W_AUTOMODE_BASE_ADD), size); | ||
| return (int)size; | ||
| } |
Comment on lines
236
to
240
| /**< data_width : 1 -> 8 bits , 2 -> 16 bits, 4 -> 32 bits, default 32 bits*/ | ||
| rt_uint8_t data_width = configuration->data_width / 8; | ||
| RT_ASSERT(data_width == 1 || data_width == 2 || data_width == 4); | ||
| configuration->data_width = configuration->data_width / 8; | ||
| spi_dev->rt_spi_cfg_t = configuration; |
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