py/ports/amiga: Wire 68k native emitter into build and fix big-endian n_state.

- py/mpconfig.h, py/emit.h, py/compile.c: add MICROPY_EMIT_68K option and
  hook it into the emitter dispatch alongside existing architectures.
- py/py.mk: include emit68k.c in the build when MICROPY_EMIT_68K is set.
- py/persistentcode.h: add MP_NATIVE_ARCH_68K enum value.
- py/emitnative.c: add N_68K guards for big-endian n_state initialisation
  (shift value left 16 bits so the uint16_t lands in the correct bytes of
  the code_state word), 68k register-local table (D7 only; A2/A3 are
  address registers and cannot hold arithmetic locals), and Scc-based
  comparison sequences for the binary-op path.
- ports/amiga/mpconfigport.h: set MICROPY_EMIT_68K=1 and keep
  MICROPY_PERSISTENT_CODE_LOAD_NATIVE=0 (loading pre-compiled native .mpy
  files is not yet supported).

Author: sidick

ports/amiga/mpconfigport.h

@@ -46,6 +46,11 @@
 // Scheduler is used by asyncio and ussl callbacks; disable for now.
 #define MICROPY_ENABLE_SCHEDULER            (0)
 
+// Native code emitter for Motorola 68020
+#define MICROPY_EMIT_68K                    (1)
+// Loading pre-compiled native .mpy files is not yet supported on this port.
+#define MICROPY_PERSISTENT_CODE_LOAD_NATIVE (0)
+
 // Amiga-specific module
 #define MICROPY_PY_AMIGA                    (1)
 

py/compile.c

@@ -123,6 +123,8 @@ static const emit_method_table_t *emit_native_table[] = {
 #define NATIVE_EMITTER(f) emit_native_xtensawin_##f
 #elif MICROPY_EMIT_RV32
 #define NATIVE_EMITTER(f) emit_native_rv32_##f
+#elif MICROPY_EMIT_68K
+#define NATIVE_EMITTER(f) emit_native_68k_##f
 #elif MICROPY_EMIT_NATIVE_DEBUG
 #define NATIVE_EMITTER(f) emit_native_debug_##f
 #else

py/emit.h

@@ -205,6 +205,7 @@ extern const emit_method_table_t emit_native_arm_method_table;
 extern const emit_method_table_t emit_native_xtensa_method_table;
 extern const emit_method_table_t emit_native_xtensawin_method_table;
 extern const emit_method_table_t emit_native_rv32_method_table;
+extern const emit_method_table_t emit_native_68k_method_table;
 extern const emit_method_table_t emit_native_debug_method_table;
 
 extern const mp_emit_method_table_id_ops_t mp_emit_bc_method_table_load_id_ops;

py/emitnative.c

@@ -59,7 +59,7 @@
 #endif
 
 // wrapper around everything in this file
-#if N_X64 || N_X86 || N_THUMB || N_ARM || N_XTENSA || N_XTENSAWIN || N_RV32 || N_DEBUG
+#if N_X64 || N_X86 || N_THUMB || N_ARM || N_XTENSA || N_XTENSAWIN || N_RV32 || N_68K || N_DEBUG
 
 // C stack layout for native functions:
 //  0:                          nlr_buf_t [optional]
@@ -147,7 +147,21 @@
 #define LOCAL_IDX_GEN_PC(emit) ((emit)->code_state_start + OFFSETOF_CODE_STATE_IP)
 #define LOCAL_IDX_LOCAL_VAR(emit, local_num) ((emit)->stack_start + (emit)->n_state - 1 - (local_num))
 
+#if N_68K
+
+// 68k: REG_LOCAL_1=D7 is the only data register safe for cached locals.
+// REG_LOCAL_2=A2 and REG_LOCAL_3=A3 are address registers; emitnative.c
+// may apply arithmetic to local-variable registers, which is invalid on An.
 #if MICROPY_PERSISTENT_CODE_SAVE
+#define REG_GENERATOR_STATE (REG_LOCAL_2)
+#define REG_QSTR_TABLE (REG_LOCAL_3)
+#else
+#define REG_GENERATOR_STATE (REG_LOCAL_2)
+#endif
+#define MAX_REGS_FOR_LOCAL_VARS (1)
+static const uint8_t reg_local_table[MAX_REGS_FOR_LOCAL_VARS] = {REG_LOCAL_1};
+
+#elif MICROPY_PERSISTENT_CODE_SAVE
 
 // When building with the ability to save native code to .mpy files:
 //  - Qstrs are indirect via qstr_table, and REG_LOCAL_3 always points to qstr_table.
@@ -625,8 +639,16 @@ static void emit_native_start_pass(emit_t *emit, pass_kind_t pass, scope_t *scop
             // Set code_state.fun_bc
             ASM_MOV_LOCAL_REG(emit->as, LOCAL_IDX_FUN_OBJ(emit), REG_PARENT_ARG_1);
 
-            // Set code_state.n_state (only works on little endian targets due to n_state being uint16_t)
+            // Set code_state.n_state.
+            // n_state is a uint16_t, but the emitter writes a full uintptr_t-sized slot.
+            // On little-endian the value naturally lands in the correct bytes.
+            // On big-endian (N_68K) the uint16_t occupies the upper half of the word,
+            // so shift the value left by 16 to place it in the correct byte positions.
+            #if N_68K
+            emit_native_mov_state_imm_via(emit, emit->code_state_start + OFFSETOF_CODE_STATE_N_STATE, (mp_uint_t)emit->n_state << 16, REG_ARG_1);
+            #else
             emit_native_mov_state_imm_via(emit, emit->code_state_start + OFFSETOF_CODE_STATE_N_STATE, emit->n_state, REG_ARG_1);
+            #endif
 
             // Put address of code_state into first arg
             ASM_MOV_REG_LOCAL_ADDR(emit->as, REG_ARG_1, emit->code_state_start);
@@ -2624,6 +2646,31 @@ static void emit_native_binary_op(emit_t *emit, mp_binary_op_t op) {
                 default:
                     break;
             }
+            #elif N_68K
+            // CMP.L reg_rhs, REG_ARG_2 → sets flags for REG_ARG_2 - reg_rhs.
+            // Scc REG_RET sets byte to 0xFF (true) or 0x00 (false).
+            // ANDI.L #1 extracts the boolean into bits 31:0 of REG_RET.
+            {
+                static const uint8_t ops[6 + 6] = {
+                    // unsigned (CMP: REG_ARG_2 - reg_rhs)
+                    ASM_68K_CC_CS,  // LESS        (carry set = below)
+                    ASM_68K_CC_HI,  // MORE        (above)
+                    ASM_68K_CC_EQ,  // EQUAL
+                    ASM_68K_CC_LS,  // LESS_EQUAL  (below or same)
+                    ASM_68K_CC_CC,  // MORE_EQUAL  (carry clear = above or same)
+                    ASM_68K_CC_NE,  // NOT_EQUAL
+                    // signed
+                    ASM_68K_CC_LT,  // LESS
+                    ASM_68K_CC_GT,  // MORE
+                    ASM_68K_CC_EQ,  // EQUAL
+                    ASM_68K_CC_LE,  // LESS_EQUAL
+                    ASM_68K_CC_GE,  // MORE_EQUAL
+                    ASM_68K_CC_NE,  // NOT_EQUAL
+                };
+                asm_68k_cmp_reg_reg(emit->as, REG_ARG_2, reg_rhs);
+                asm_68k_scc_dreg(emit->as, ops[op_idx], REG_RET);
+                asm_68k_andi_l(emit->as, REG_RET, 1);
+            }
             #elif N_DEBUG
             asm_debug_setcc_reg_reg_reg(emit->as, op_idx, REG_RET, REG_ARG_2, reg_rhs);
             #else

py/mpconfig.h

@@ -536,7 +536,7 @@ typedef uint64_t mp_uint_t;
 #endif
 
 // Convenience definition for whether any native emitter is enabled
-#define MICROPY_EMIT_NATIVE (MICROPY_EMIT_X64 || MICROPY_EMIT_X86 || MICROPY_EMIT_THUMB || MICROPY_EMIT_ARM || MICROPY_EMIT_XTENSA || MICROPY_EMIT_XTENSAWIN || MICROPY_EMIT_RV32 || MICROPY_EMIT_NATIVE_DEBUG)
+#define MICROPY_EMIT_NATIVE (MICROPY_EMIT_X64 || MICROPY_EMIT_X86 || MICROPY_EMIT_THUMB || MICROPY_EMIT_ARM || MICROPY_EMIT_XTENSA || MICROPY_EMIT_XTENSAWIN || MICROPY_EMIT_RV32 || MICROPY_EMIT_68K || MICROPY_EMIT_NATIVE_DEBUG)
 
 // Some architectures cannot read byte-wise from executable memory.  In this case
 // the prelude for a native function (which usually sits after the machine code)

py/persistentcode.h

@@ -83,6 +83,8 @@
         #else
             #error "Unsupported RISC-V architecture."
         #endif
+    #elif defined(__mc68020__) || defined(__m68k__)
+        #define MPY_FEATURE_ARCH (MP_NATIVE_ARCH_68K)
     #else
         #error "Unsupported native architecture."
     #endif
@@ -116,6 +118,7 @@ enum {
     MP_NATIVE_ARCH_XTENSAWIN,
     MP_NATIVE_ARCH_RV32IMC,
     MP_NATIVE_ARCH_RV64IMC,
+    MP_NATIVE_ARCH_68K,
     MP_NATIVE_ARCH_DEBUG, // this entry should always be last
 };
 

py/py.mk

@@ -126,6 +126,8 @@ PY_CORE_O_BASENAME = $(addprefix py/,\
 	asmrv32.o \
 	emitnrv32.o \
 	emitinlinerv32.o \
+	asm68k.o \
+	emit68k.o \
 	emitndebug.o \
 	formatfloat.o \
 	parsenumbase.o \