GPUModule.sv.bak

module GPU{
	// Synchronization
	input logic Clock,
	input logic Reset,
	// VGA In-Out
	output logic hsync,
	output logic vsync,
	output logic[7:0] red,
	output logic[7:0] green,
	output logic[7:0] blue,
	output logic PxClock,
	output logic Blank,
	output logic Sync,
	// Video RAM Access
	output logic[19:0] RAMAddress,
	inout logic[15:0] RAMData,
	output logic RAMHB,
	output logic RAMLB,
	output logic RAMOE,
	output logic RAMWE,
	output logic RAMCE,
	// Bus Interface
	input logic [32:0] BusAddress,
	inout logic [32:0] BusData,
	input logic DataRead,
	input logic DataWrite
	};
	// VGA timings https://timetoexplore.net/blog/video-timings-vga-720p-1080p
	localparam HS_STA = 16;              // horizontal sync start
	localparam HS_END = 16 + 96;         // horizontal sync end
	localparam HA_STA = 16 + 96 + 48;    // horizontal active pixel start
	localparam VS_STA = 480 + 10;        // vertical sync start
	localparam VS_END = 480 + 10 + 2;    // vertical sync end
	localparam VA_END = 480;             // vertical active pixel end
	localparam LINE   = 800;             // complete line (pixels)
	localparam SCREEN = 525;             // complete screen (lines)
	
	reg [9:0] h_count;  // line position
   reg [9:0] v_count;  // screen position

	logic Active,
			ReadTime,
			WriteTime,
			PixelClock;
	
	logic RedOut,
			GreenOut,
			BlueOut,
			RedNext,
			GreenNext;
	
   // generate sync signals (active low for 640x480)
   assign hsync = ~((h_count >= HS_STA) & (h_count < HS_END));
   assign vsync = ~((v_count >= VS_STA) & (v_count < VS_END));

   // keep x and y bound within the active pixels
   assign o_x = (h_count < HA_STA) ? 0 : (h_count - HA_STA);
   assign o_y = (v_count >= VA_END) ? (VA_END - 1) : (v_count);
	
	// blanking: high within the blanking period
   assign Blank = ((h_count < HA_STA) | (v_count > VA_END - 1));

   // active: high during active pixel drawing
   assign Active = ~((h_count < HA_STA) | (v_count > VA_END - 1));
	
	assign ReadTime = (h_count > HA_STA - 1) & (v_count < VA_END -1);
	assign WriteTime = ~ReadTime;
	
	always_comb
	begin
		//RAM signals
		RAMCE=0;
		RAMLB=0;
		RAMHB=0;
	end
	
	always_ff @ (posedge Clock)
	begin
		PixelClock=~PixelClock;
	end

	always_ff @ (posedge Clock)
   begin
		if (Reset)  // reset to start of frame
		begin
			h_count <= 0;
			v_count <= 0;
		end
		if (i_pix_stb)  // once per pixel
		begin
			if (h_count == LINE)  // end of line
			begin
				h_count <= 0;
				v_count <= v_count + 1;
			end
			else
				h_count <= h_count + 1;

				if (v_count == SCREEN)  // end of screen
					v_count <= 0;
			end
		end
	end
endmodule